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NXP Semiconductors /QN908XC /FSP /CORDIC_T0UP_ILOL

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Interpret as CORDIC_T0UP_ILOL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CORDIC_T0UP_ILOL_SRC0CORDIC_T0UP_ILOL_DST

Description

native cordic input float output float, t=0, u=1 mode data address register

Fields

CORDIC_T0UP_ILOL_SRC

CORDIC_T0UN_ILOL input data source word address. Input float output float
CORDIC_T0UP_ILOL_DST

CORDIC_T0UN_ILOL output data destination word address. X is saved at here Y is saved at word address CORDIC_T0UN_ILOL_DST+1. Input float output float

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data